NVIDIA Vera CPU: What an Independent Lab Measured

NVIDIA enters the general server-CPU market with Vera. StorageReview published the first comprehensive independent test, on November 10, 2026. (Quelle: Simple Icons, CC0)

When Proxmox VE 9.2 opened ARM64 support in the summer of 2026, the list was short: exactly two platform families are fully supported, NVIDIA Grace Hopper and NVIDIA Vera, while every other UEFI system from ARMv9-A runs on a best-effort basis. On November 10, 2026, StorageReview published the first large independent test of the Vera CPU, against five x86 comparison systems. The answer reads more differentiated than the vendor headline.

Vera is NVIDIA's first server CPU for the general market: 88 custom Olympus cores with 176 threads, Armv9.2, SVE2 vectors, and LPDDR5X memory on SOCAMM modules specified up to 1.5 TB per socket. Second-generation NVLink-C2C couples the two sockets, and each socket exposes 88 PCIe Gen6 lanes. NVIDIA rates the socket at a configurable 250 to 450 watts.

The test vehicle and the comparison base

Kevin O'Brien tested an air-cooled 2U reference system on NVIDIA MGX base carrying 768 GB LPDDR5X per socket; the 1.5 TB headline is a design value this machine does not fill. The comparison systems all came from one hand: five Dell PowerEdge configurations.

Condition	Detail
Measurement date	published November 10, 2026
Test vehicle	NVIDIA MGX Vera C2 reference system, 2 sockets, 16 x 96 GB Micron SOCAMM2, 768 GB per socket, air cooling, 2U
Comparison base	five Dell PowerEdge: EPYC 9175F (32C), EPYC 9965 (384C), Xeon 6978P (240C), Xeon 6787P (172C), Xeon 8592+ (128C)
Units	GB/s (STREAM), ns/day (GROMACS), seconds (ClickBench), MIPS (7-Zip), rps (NGINX)
Software on Vera	Ubuntu 26.04.1, kernel 7.0.0-nvidia, GCC 15.2, glibc 2.43
Software on x86	Ubuntu 24.04.5, kernel 6.8, GCC 13.3, glibc 2.39

We did not re-run any of this. All figures below quote the StorageReview protocol.

Memory bandwidth sets the scale

The strongest number of the test: STREAM Triad with a 16 GiB array, whole system, SMT off, 2,073 GB/s sustained, 86 percent of the 2.4 TB/s rated for two sockets. The next value: 914 GB/s from a Xeon 6978P with 24 DDR5 sticks at 74 percent of its own rating, so Vera leads by 2.3x; the EPYCs trail clearly behind.

Vera with 88 cores and attached LPDDR5X moves more throughput than the RDIMM-populated x86 systems beside it. No system reaches its rated value: Vera 86 percent, the Xeon 74 percent, the EPYC 9965 only 52 percent. (Quelle: StorageReview)

Locally at one socket, StorageReview measures 1,055 GB/s, 88 percent of the 1.2 TB/s rated per socket, more than any x86 system manages across all its channels. Remote access over the C2C bridge costs Vera 36 percent (677 GB/s) against 41 to 55 percent on the x86 candidates, and even that remote value beats the best local per-socket figure of an x86 competitor (460 GB/s).

A comparability error hides in the build: the STREAM binaries ran on plain GCC without streaming stores, which penalizes traffic-heavy routines on x86. With the build flags of the PTS suite, the EPYC 9965 reached 832 instead of 551 GB/s on the copy test, a factor of 1.5. Corrected accordingly, the 9965 would sit near 845 GB/s, and Vera's lead over it shrinks from 3.3 to 2.5. The 2.3 gap against the Xeon remains the most solid number.

Latency only wins with hugepages

The latency runs (tinymembench, 1 GiB random access) exist only against the EPYC 9175F. With 2 MB hugepages, Vera reads locally in 99.2 ns against 114.3 ns, a 13 percent edge. On 4 KB pages both measure around 135 ns, a tie. Remote access costs Vera 212.7 ns while the EPYC reaches 199.9 ns, and on 4 KB pages Vera falls back to 308.4 ns against 228.6 ns. StorageReview's most useful operational line in the whole test: on Vera you would run hugepages. That recommendation holds for every new platform.

Single thread: two wins and one clear defeat

7-Zip compresses single-threaded at 9,537 MIPS, twelve percent ahead of the 5.0 GHz EPYC 9175F, the fastest x86 core in the field; decompression ends in a tie, 6,016 against 6,000 MIPS. In the pyperformance suite the go benchmark runs in 58.1 ms (15 percent ahead) and regex_compile in 53.1 ms (25 percent). The toolchain trap belongs here: Vera ran Python 3.14.4, the x86 systems 3.12.3.

The defeat is called OpenSSL. AES-256-GCM reaches 6.2 GB/s single-threaded against 19.3 GB/s on the 9175F, roughly a third. Across all threads the gap closes to field average (1.26 TB/s, just ahead of the Xeon 8592+), while the EPYC 9965 pulls away at 3.96 TB/s. The reason is width: only two of the six SVE2 pipelines execute crypto operations, and x86 encrypts with VAES across the full 512 bits. For TLS termination this is a hardware disadvantage, not a build problem.

Databases, analytics, web: mixed with outliers

HammerDB's TPROC-C (maintainer Steve Shaw, 16 warehouses per physical core) compared one socket against one socket: 88 Vera cores against 192 cores of the EPYC 9965. PostgreSQL lands at plus 26 percent for Vera, MariaDB at plus 8, MySQL at minus 19, VillageSQL at minus 15; the Xeon 6787P trailed all five engines. ClickBench (hot run, SMT off) finishes Vera in 2.09 s, the 9965 needs 2.70 s, the rest 2.93 to 3.04 s. NGINX (wrk on the same machine) delivers 306,000 rps at 1,000 connections, mid-field in a spread of 263,000 to 402,000.

Scientific loads split in two. On a large mesh, OpenFOAM runs Vera 1.44 times faster than the 384-core EPYC and 1.20 times faster than the Xeon 6978P, where the 164 MB cache pays off. GROMACS benchPEP over all threads goes to the 9965 by a factor of three (5.36 against 1.77 ns/day), while Vera holds the best per-core efficiency in the field at 0.0100 ns/day. And schbench, the scheduler wake-up test, shows Vera's weakest side: 221 microseconds median at four message threads, behind every system except the Xeon 6978P, with the EPYC 9175F waking in 19 microseconds.

What NVIDIA advertises and what was measured

NVIDIA advertises 1.8x performance for agentic sandboxes, 1.5x for RL rollouts, and 2.1x for data processing; the footnote on the slide says measured and projected. StorageReview ran none of those workloads. Oracle restated the number on October 27, 2026 as 80 percent faster agentic CPU performance for OCI bare metal, and the footnote there states plainly: the claim rests on NVIDIA platform benchmarks, not on OCI instance measurements. The OCI shape names two Vera with 176 cores, 1 TB LPDDR5X, 7.68 TB NVMe, and 200 Gb/s networking. Neither Oracle nor the announced OEM systems carry a price.

Four traps and the dissent

First, the toolchain asymmetry: Ubuntu 26.04.1 against 24.04.5, GCC 15.2 against 13.3, Python 3.14 against 3.12, part of the runtime lead is version state. Second, the single-OEM base: all five comparison systems come from Dell, whose BIOS settings are not disclosed. Third, the STREAM build without streaming stores, which depresses the x86 bandwidth figures by roughly a quarter. Fourth, the TDP: the review names no configured value for the tested C2 reference system, the 250 to 450 watts appear only in NVIDIA's product table, so an energy comparison is impossible.

Chips and Cheese accused the whitepaper of selection (208 points on Hacker News), because NVIDIA's agentic suite comes down to four SPEC2026 compiler tests. AMD countered with the EPYC 9996 at a claimed 2.24x Vera in SPECrate 2026, under its own caveat of projected scaling factors. Optimized builds for the Olympus cores additionally arrive only with GCC 16.1 or Clang 21; compiling for Vera today means running generic code.

What this means for our operation

Both inference nodes in the house run x86, the production host with an EPYC and four RTX 5090, the fallback node with an EPYC 7502. A purchase path for Vera does not exist, only announcements without prices, so the platform stays under observation without our own measurement. The ARM64 question in the existing fleet is covered by the post Proxmox VE 8: support ends in August. Immediately useful without re-measuring stays the hugepages recommendation, an operational rule for every new host, x86 included. The underlying mechanism, memory bandwidth against number of boxes, is spelled out in more detail in the post on the two GB300 towers.